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Design and Implementation of Montgomery Modular Using 8X8 Bit UT Multiplier
Large integer multiplication is the critical operation to design a modular multiplier. The final product can be obtained suitably by adding the outputs of 4X4 bit multipliers. Also two adders are required similarly in the final stage. Now 4x4 bits multiplier which is the basic building block of 8x8 bits UT multiplier is which implemented in its structural model. The fastest design of a circuit can be obtained by structural modeling. This design can run at the technology of 90nm with 1920 LUTs and No. of slices of 960 approximately. In addition, our design can obtain the result of Montgomery modular multiplier for every clock. Compared with other designs on FPGA, our design shows a better performance in term of area-time product.
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